o Creating a Voltage Area (Physical Implementation): A voltage area is a physical region on the chip floorplan designated to contain logic operating at a specific voltage level different from other regions, or logic that can be power-gated:
Define the physical boundary (coordinates) of the region- create_voltage_area
Associate this region with a specific power domain defined in the UPF/CPF.
cells belonging to the corresponding power domain are placed within this physical voltage area during placement.
Voltage Domain vs. Power Domain:
Power Domain (PD): A logical concept defined in UPF. It represents a collection of instances (logic hierarchy) that share a common primary power and ground supply network and potentially common power management characteristics (e.g., can be switched off together). A PD defines the scope of power management intent. Multiple power domains can exist even if they operate at the same voltage level, especially if they have different power-gating controls. (e.g., create_power_domain PD_CPU, create_power_domain PD_GPU).
Voltage Domain: set of power domains that operate at the same voltage level. The primary supply nets associated with the power domains within a voltage domain would connect to the same voltage source (e.g., 0.9V). UPF defines power states and supply nets, implicitly grouping domains by voltage