Why timing correlation issues occur between block level and top level, even with the same clock source?

oupdate_io_latency not done at block level. This ensures proper clock tree built for IO paths and gives feedback to top level tree so tree is balanced for io paths.

  • IO constraints like input_delay and output_delay is assumption. Actual delay might be different and hence misscorelation.
  • Different derate factors at top level or OCV variation?
  • May introduce additional SI effect during top level
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