oLogical View (Timing Model - .lib or .db**):**
- Provides the timing characteristics of the sub-block’s input/output pins (setup/hold times, clock-to-output delays, internal path delays)
- Defines cell functions (if it’s a soft macro with standard cells) or overall block function.
- Needed for top-level STA and synthesis (if the sub-block is a soft/firm macro).
- Physical View (Abstract Layout Model - LEF):
- .lef file of Hard Macro or soft macro/sub blocks.
- Defines the physical footprint (width, height), pin locations, pin layers, metal blockages (OBS layers) within the sub-block.
- Constraint View (SDC partial/interface):
- Interface timing constraints for the sub-block’s pins (e.g., specific false paths or multicycle paths internal to the IP that the top level should be aware of, or constraints on its I/O pins).
- UPF and GDS for merging at last to get complete top-level GDS.