- Gate-Level Netlist:
- Timing Libraries (.lib or .db**)**
- Physical Libraries (.lef**):**
- technology process rules (tech LEF).
- Timing Constraints (SDC - Synopsys Design Constraints):
- Power Intent (UPF/CPF - Optional but common):
- RC Extraction Files (Optional initial estimate, more critical later): tlu+, qrcTech
- Floorplan Definition File (DEF - Optional):
- Scan Definition File (Scan DEF - Optional):
- MMMC (Multi-Mode Multi-Corner) Setup File
Physical Design Interview Guide
The Ultimate Guide to Physical Design Interview Questions