What type of DRCs are related to advanced nodes (e.g., 3nm)?

Q: "What type of DRCs are related to advanced nodes (e.g., 3nm)?"

"oMulti-Patterning Rules: Assigning diff masks to shapes based on adjacent mask, if it is odd cycle violation, loop violation.\nVia Rules: Via Stacking \u0026amp; Alignment: Very tight rules on stacking multiple vias and their alignment to metal layers above and below. Via Enclosure by Metal: Stricter metal enclosure around vias. Interconnect Rules: Minimum Metal Pitch: Extremely tight metal width and spacing rules. End-of-Line (EOL) Spacing: Specific, often larger, spacing required at the ends of …"

oMulti-Patterning Rules: Assigning diff masks to shapes based on adjacent mask, if it is odd cycle violation, loop violation.

Via Rules:
Via Stacking & Alignment: Very tight rules on stacking multiple vias and their alignment to metal layers above and below.
Via Enclosure by Metal: Stricter metal enclosure around vias.
Interconnect Rules:
Minimum Metal Pitch: Extremely tight metal width and spacing rules.
End-of-Line (EOL) Spacing: Specific, often larger, spacing required at the ends of metal lines.
Complex Conditional Spacing: Spacing rules that change based on parallel run length, adjacent feature types, or layer.
fixing-double-patterning-errors-at-20nm

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